;     Titan & MDEM Cooperational Demo
;     For Revision 2013
;
;     macros.68k - Macros for general usage

ModeReg1    EQU $80  ; Mode Register 1
ModeReg2    EQU $81  ; Mode Register 2
ScrollA     EQU $82  ; Scroll Layer A nametable data location
Window      EQU $83  ; Window Plane nametable data Location
ScrollB     EQU $84  ; Scroll Layer B nametable data Location
Sprites     EQU $85  ; Sprite definition data Location
BGColor     EQU $87  ; Background Color selection
HIntValue   EQU $8A  ; Horizontal Interrupt Interval
ModeReg3    EQU $8B  ; Mode Register 3
ModeReg4    EQU $8C  ; Mode Register 4 
HScroll     EQU $8D  ; Horizontal Scroll Data Location
AutoInc     EQU $8F  ; Auto Increment Value
ScrollSize  EQU $90  ; Scroll Layer Size
WindowX     EQU $91  ; Window Plane Horizontal Position
WindowY     EQU $92  ; Window Plane Vertical Position
DmaLength1  EQU $93
DmaLength2  EQU $94
DmaSource1  EQU $95
DmaSource2  EQU $96
DmaSource3  EQU $97



SetVDPReg macro   reg, val, dest
   move.w #((\reg*256)+\val), (\dest)
   endm


align macro 
    cnop 0,\1
    endm

;****************************************************************************
; SetVRAMAddr, SetCRAMAddr, SetVSRAMAddr
; Quick macros to make a VDP command to specify an address
;----------------------------------------------------------------------------
; input addr ... VRAM/CRAM/VSRAM address
; input dest ... Where to write the command
;****************************************************************************

SetVRAMAddr: macro addr, dest
    move.l  #$40000000|((\addr)&$3FFF)<<16|(\addr)>>14, (\dest)
    endm

SetCRAMAddr: macro addr, dest
    move.l  #$C0000000|((\addr)&$3FFF)<<16|(\addr)>>14, (\dest)
    endm

SetVSRAMAddr: macro addr, dest
    move.l  #$40000010|((\addr)&$3FFF)<<16|(\addr)>>14, (\dest)
    endm
    
;****************************************************************************
; DMA2VRAM, DMA2CRAM, DMA2VSRAM
; Macros for issuing DMA commands
; All source, destination and length are fixed
;----------------------------------------------------------------------------
; input src .... Source address (ROM/RAM)
; input dest ... Destination address (VRAM/CRAM/VSRAM)
; input len .... Length (in bytes)
; input reg .... Register used when writing (A* register)
;----------------------------------------------------------------------------
; output reg ... Pointer to end of DMA command
;****************************************************************************

SingleDMAVRAM: macro src, dest, len, reg
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)
    move.l  #$96009500|(((\src)<<7)&$FF0000)|(((\src)>>1)&$FF), (\reg)
    move.w  #$9700|(((\src)>>17)&$FF), (\reg)
    move.l  #$40000080|((\dest)&$3FFF)<<16|(\dest)>>14, (\reg)
    endm
    
SingleDMACRAM: macro src, dest, len, reg
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)
    move.l  #$96009500|(((\src)<<7)&$FF0000)|(((\src)>>1)&$FF), (\reg)
    move.w  #$9700|(((\src)>>17)&$FF), (\reg)
    move.l  #$C0000080|((\dest)&$3FFF)<<16|(\dest)>>14, (\reg)
    endm

SingleDMAVSRAM: macro src, dest, len, reg
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)
    move.l  #$96009500|(((\src)<<7)&$FF0000)|(((\src)>>1)&$FF), (\reg)
    move.w  #$9700|(((\src)>>17)&$FF), (\reg)
    move.l  #$40000090|((\dest)&$3FFF)<<16|(\dest)>>14, (\reg)
    endm    
    
DMA2VRAM: macro src, dest, len, reg
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)+
    move.l  #$96009500|(((\src)<<7)&$FF0000)|(((\src)>>1)&$FF), (\reg)+
    move.w  #$9700|(((\src)>>17)&$FF), (\reg)+
    move.l  #$40000080|((\dest)&$3FFF)<<16|(\dest)>>14, (\reg)+
    endm

DMA2CRAM: macro src, dest, len, reg
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)+
    move.l  #$96009500|(((\src)<<7)&$FF0000)|(((\src)>>1)&$FF), (\reg)+
    move.w  #$9700|(((\src)>>17)&$FF), (\reg)+
    move.l  #$C0000080|((\dest)&$3FFF)<<16|(\dest)>>14, (\reg)+
    endm

DMA2VSRAM: macro src, dest, len, reg
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)+
    move.l  #$96009500|(((\src)<<7)&$FF0000)|(((\src)>>1)&$FF), (\reg)+
    move.w  #$9700|(((\src)>>17)&$FF), (\reg)+
    move.l  #$40000090|((\dest)&$3FFF)<<16|(\dest)>>14, (\reg)+
    endm  


DMA2VRAM_SD: macro src, dest, len, reg
    movem.l \src-\dest, -(sp)
    lsr.l   #1, \src
    move.l  #$97009600, 4(\reg)
    move.w  #$9500, 8(\reg)
    movep.l \src, 3(\reg)
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)
    lea     10(\reg), \reg
    and.l   #$FFFF, \dest
    add.l   \dest, \dest
    add.l   \dest, \dest
    lsr.w   #2, \dest
    swap    \dest
    or.l    #$40000080, \dest
    move.l  \dest, (\reg)+
    movem.l (sp)+, \src-\dest
    endm


DMA2VRAM_S: macro src, dest, len, reg
    lsr.l   #1, \src
    move.l  #$97009600, 4(\reg)
    move.w  #$9500, 8(\reg)
    movep.l \src, 3(\reg)
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)
    lea     10(\reg), \reg
    move.l  #$40000080|((\dest)&$3FFF)<<16|(\dest)>>14, (\reg)+
    endm




DMA2VRAM_VS: macro src, dest, len, reg
    lsr.l   #1, \src
    move.l  #$97009600, 4(\reg)
    move.w  #$9500, 8(\reg)
    movep.l \src, 3(\reg)
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)
    ;lea     10(\reg), \reg
    move.l  #$40000080|((\dest)&$3FFF)<<16|(\dest)>>14, 10(\reg)
    move.l  (\reg)+, ($C00004)
    move.l  (\reg)+, ($C00004)
    move.l  (\reg)+, ($C00004)
    move.w  (\reg)+, ($C00004)
    endm

DMA2CRAM_VS: macro src, dest, len, reg
    lsr.l   #1, \src
    move.l  #$97009600, 4(\reg)
    move.w  #$9500, 8(\reg)
    movep.l \src, 3(\reg)
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)

    move.l  #$C0000080|((\dest)&$3FFF)<<16|(\dest)>>14, 10(\reg) 
    move.l  (\reg)+, ($C00004)
    move.l  (\reg)+, ($C00004)
    move.l  (\reg)+, ($C00004)
    move.w  (\reg)+, ($C00004)
    endm
    
DMA2CRAM_S: macro src, dest, len, reg
    lsr.l   #1, \src
    move.l  #$97009600, 4(\reg)
    move.w  #$9500, 8(\reg)
    movep.l \src, 3(\reg)
    move.l  #$94009300|(((\len)<<7)&$FF0000)|(((\len)>>1)&$FF), (\reg)
    lea     10(\reg), \reg
    move.l  #$C0000080|((\dest)&$3FFF)<<16|(\dest)>>14, (\reg) 
    endm



    
WaitFrame macro
    btst #3, (VDPControl+1)
    bne.s *-8
    btst #3, (VDPControl+1)
    beq.s *-8
    endm
DisableInts macro
    move #$2700, sr
    endm

EnableInts macro
    move #$2000, sr
    endm
    